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Freescale beefs up DSP with enhanced acceleration engine
Austin, Tex. — Freescale Semiconductor introduces the MSC8155, a higher performance and cost-optimized version of the company’s flagship MSC8156 digital signal processor (DSP) based on the latest StarCore technology. The MSC8155 includes next-generation acceleration and interconnect technologies that boost overall chip performance and further enhance the capabilities of broadband wireless base station equipment, says Freescale.
Similar to the MSC8156, the MSC8155 processor integrates six SC3850 StarCore DSP cores running at 1 GHz on a single die, delivering 6 GHz of raw DSP performance. The SC3850 core recently earned the best-ever fixed-point BDTImark2000 benchmark score from independent signal-processing technology analysis firm, Berkeley Design Technology, Inc.
Major enhancements to the MSC8155 include a second-generation version of Freescale’s multi-accelerator platform engine acceleration block (MAPLE-B2L) and the newest interconnect Serial RapidIO Gen2 technology. The MSC8155 DSP supports existing 3G-UMTS, TD-SCDMA and WiMAX base station deployments and upcoming 3G-LTE standards such as FDD-LTE and TDD-LTE features including Turbo/Viterbi FEC.
Freescale says the DSP is designed to help original equipment manufacturers (OEMs) take full advantage of 3G-LTE, HSPA+ and WiMAX at very high throughput required for advanced 20-MHz 3G-LTE and HSPA+ base stations. The raw performance of the fully programmable cores and the MAPLE-B2L acceleration technology also eliminate the need to incorporate FPGAs or develop ASIC devices for 3G-LTE and WiMAX base stations.
The MSC8155 DSP, housed in a 783-pin FC-PBGA package, is code- and pin-compatible with the MSC8156. The enhanced MAPLE-B2L baseband accelerator embedded in the MSC8155 DSP gives OEMs more headroom to easily add differentiating features, says Freescale. The accelerator features a new high-performance Turbo encoder, a higher throughput Turbo decoder and Fourier transforms acceleration engines.
The MAPLE-B2L offers turbo decoding with rate de-matching and HARQ-combining capacity of up to 330 Mbits/s at eight iterations, Viterbi decoding of up to 200 Mbits/s and turbo encoding with rate matching capabilities up to 900 Mbits/s. The embedded FFT engines support up to 900 Ms/s of FFT/iFFT or 630 Ms/s of DFT/iDFT throughputs. It also provides CRC check or insertion with up to 10 Gbits/s throughput.
To support the high throughput generated by the six high-performance cores and MAPLE-B2L, the MSC8155 provides the latest Serial RapidIO Gen2 standard serial interface supporting up to 5 Gbaud per lane and featuring enhanced messaging unit support for Type 9 streaming that enables the combination of multiple and different types of data streams over the same interconnect. It delivers up to 16 Gbits/s bandwidth for each direction to enable high throughput interconnect between multiple devices on multi-DSP multi-sector base station channel cards. Other high bandwidth peripherals include Dual Gigabit Ethernet SGMII/RGMII and 64-bit DDR2/3 memory interface at 800 MHz.
Freescale offers a full set of development tools and enablement software. The CodeWarrior Integrated Development Environment (IDE) leverages Eclipse technology to provide a comprehensive multicore development environment. It includes C and C++ optimizing compilers, a source level debugger, core and device simulators, software analysis plug-ins for profiling and program/data trace, and the royalty-free SmartDSP operating system delivered with optimized device drivers.
Development boards are available to enable software development along with a set of reference software components for key 3G-LTE algorithms.
Availability: The MSC8156 DSP has been qualified on advanced 45-nm process technology and is now ramping into production. Freescale plans to sample the new MSC8155 device to select customers in the third quarter of 2010.
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